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Performance and Analysis of n-Type Vertically Stacked Nanowires Regarding Harmonic Distortion
(2020-08-11)
Thispaperstudies theharmonic distortion (or non-linearity) of vertically stacked SOI nanowireswith differ-ent fin widths and channel lengths. The total harmonic distor-tion and third order harmonic distortion areused ...
Analytical Model for Low-Frequency Noise in Junctionless Nanowire Transistors
(2020-04-24)
This article aims at proposing a compact analytical model for the low-frequency noise (LFN) of junctionless nanowire transistors (JNTs), operating at different bias conditions and temperatures. The model is validated through ...
3D simulation of triple-gate MOSFETs with different mobility regions
(2011-07-05)
In this paper we present a new approach for analyzing 3D structure triple-gate MOSFETs using three different regions, one at the top and two in the sidewalls of the fin, which allows for considering different carrier ...
Experimental evaluation of mismatching on the analog characteristics of GC SOI MOSFETs
(2017-07-28)
This paper presents an experimental study of mismatching on the analog characteristics of fully-depleted graded-channel SOI MOSFET in comparison to uniformly doped transistors. The study is carried out using dedicated ...
Experimental Assessment of Variability in Junctionless Nanowire nMOS Transistors
(2021-09-06)
In this work, experimental assessment of the variability of threshold voltage and drain current in junctionless nanowire n MOS transistors is presented. Die-to-die variability of threshold voltage and drain current is ...
Physical Characterization of TiOx layers deposited from sol-gel technique
(2013-09-06)
Titanium Oxide (TiOx) is a material that can be used as optical spacer and injection/transport layer in organic devices as OLEDs and OPDs, as well as a high relative dielectric constant, (high-k), dielectric for organic ...
Improved current mirror performance using graded-channel silicon-on-insulator devices in high temperature operation
(2004-09-11)
This work studies the output characteristics of analog current mirror using graded-channel in comparison to conventional Silicon-On-Insulator MOSFETs in high temperature operation. The output characteristics are discussed, ...
Simulation of a miller OpAmp with FinFETs at high temperatures
For practical applications temperature can play an important role in the performance of a circuit. This paper describes the performance of a Miller Operational Amplifier with FinFET transistors operating in a wide temperature ...
Asymmetric self-cascode configuration to improve the analog performance of SOI nMOS transistors
(2011-10-11)
In this work an asymmetric self-cascode (SC) structure implemented in a 150nm technology have been studied as a function of the threshold voltage and length of both transistors in the structure, aiming to improve the analog ...
Study of matching properties of graded-channel SOI MOSFETs
(2008-01-05)
In this paper an overall analysis on the matching properties of Graded-Channel (GC) SOI MOSFETs in comparison to conventional SOI transistors is performed. Experimental results show that GC devices present poorer matching ...