Search

Now showing items 21-25 of 25

Operation of lateral SOI PIN photodiodes with back-gate bias and intrinsic length variation

Novo C.; Giacomini R.; Afzalian A.; Flandre D. (2013)

This paper presents an analysis of the operation of lateral thin-film SOI PIN photodiodes for the detection of short wavelengths. Experimental measurements were done varying the back-gate bias in order to point out the ...

A charge-based continuous model for submicron graded-channel nMOSFET for analog circuit simulation

De Souza M.; Pavanello M.A.; Iniguez B.; Flandre D. (2005)

In this work a continuous analytical model for analog simulation of submicron asymmetrically doped silicon-on-insulator (SOI) nMOSFET using the graded-channel (GC) architecture, valid from weak to strong inversion regimes, ...

Gain improvement in operational transconductance amplifiers using Graded-Channel SOI nMOSFETS

Gimenez S.P.; Pavanello M.A.; Martino J.A.; Flandre D. (2006)

This paper studies the performance of operational transconductance amplifiers (OTAs) fabricated with Graded-Channel (GC) SOI nMOSFETs and designed to provide high open-loop voltage gain or high gain-bandwidth characteristics. ...

Boosting the total ionizing dose tolerance of digital switches by using OCTO SOI MOSFET

De Souza Fino L.N.; Davini Neto E.; Da Silveira M.A.G.; Renaux C.; Flandre D.; Gimenez S.P. (2015)

© 2015 IOP Publishing Ltd.This paper performs an experimental comparative study of the total ionizing dose effects due to the x-ray radiation between the silicon-on-insulator (SOI) metal-oxide semiconductor field-effect ...

Modeling of thin-film lateral SOI PIN diodes with an alternative multi-branch explicit current model

Lugo-Munoz; Muci J.; Ortiz-Conde A.; Garcia-Sanchez F.J.; de Souza M.; Flandre D.; Pavanello M.A. (2012)

We propose the use of an alternative multi-exponential model to describe multiple conduction mechanisms in thin-film SOI PIN diodes with parasitic series resistance over a wide operating temperature range, from 90 to 390 ...