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Now showing items 11-20 of 24

Compact diamond MOSFET model accounting for PAMDLE applicable down 150 nm node

Gimenez S.P.; Davini E.; Peruzzi V.V.; Renaux C.; Flandre D. (2014)

© The Institution of Engineering and Technology 2014.The performance improvements for integrated circuit applications of silicon-on-insulator (SOI) metal-oxide semiconductor field-effect transistors (MOSFETs) implemented ...

Asymmetric channel doping profile and temperature reduction influence on the performance of current mirrors implemented with FD SOI nMOSFETs

De Souza M.; Paz B.C.; Flandre D.; Pavanello M.A. (2013)

In this work a comparison between the performance of current mirrors implemented with uniformly doped and graded-channel (GC) transistors operating down to low temperature (150 K) is presented. This analysis has been carried ...

Advantages of the graded-channel SOI FD MOSFET for application as a quasi-linear resistor

Cerdeira A.; Aleman M.A.; Pavanello M.A.; Martino J.A.; Vancaillie L.; Flandre D. (2005)

In this paper, we analyze the previously unexpected advantages of asymmetric channel engineering on the MOS resistance behavior in quasi-linear operation, such as used in integrated continuous-time tunable filters. The ...

Improved operation of graded-channel SOI nMOSFETs down to liquid helium temperature

Pavanello M.A.; De Souza M.; Ribeiro T.A.; Martino J.A.; Flandre D. (2016)

© 2016 IOP Publishing Ltd.This paper presents the operation of Graded-Channel (GC) Silicon-On-Insulator (SOI) nMOSFETs at low temperatures down to liquid helium temperature in comparison to standard uniformly doped ...

An in-depth analysis of temperature effect on DIBL in UTBB FD SOI MOSFETs based on experimental data, numerical simulations and analytical models

Pereira A.S.N.; de Streel G.; Planes N.; Haond M.; Giacomini R.; Flandre D.; Kilchytska V. (2017)

© 2016 Elsevier LtdThe Drain Induced Barrier Lowering (DIBL) behavior in Ultra-Thin Body and Buried oxide (UTBB) transistors is investigated in details in the temperature range up to 150 °C, for the first time to the best ...

The low-frequency noise behaviour of graded-channel SOI nMOSFETs

Simoen E.; Claeys C.; Chung T.M.; Flandre D.; Pavanello M.A.; Martino J.A.; Raskin J.-P. (2007)

It is shown that the low-frequency noise in graded-channel (GC) SOI nMOSFETs is generally of the flicker or 1/f noise type. The corresponding input-referred noise spectral density is markedly higher than for the conventional ...

Using diamond layout style to boost MOSFET frequency response of analogue IC

Gimenez S.P.; Leoni R.D.; Renaux C.; Flandre D. (2014)

A way to improve the metal-oxide-semiconductor field effect transistor (MOSFET) analogue electrical performance, still little explored, is to modify their aspect form or ratio (AR) by the use of innovative layout styles. ...

Harmonic distortion analysis of double gate graded-channel MOSFETs operating in saturation

Doria R.T.; Cerdeira A.; Raskin J.-P.; Flandre D.; Pavanello M.A. (2008)

In this work we present an analysis of harmonic distortion (HD) in graded-channel (GC) gate-all-around (GAA) devices operating in saturation region for analog applications. The study has been performed through device ...

Experimental and simulation analysis of electrical characteristics of common-source current mirrors implemented with asymmetric self-cascode silicon-on-insulator n-channel metal-oxide-semiconductor field-effect transistors

Assalti R.; d'Oliveira L.M.; Pavanello M.A.; Flandre D.; de Souza M. (2016)

© The Institution of Engineering and Technology 2016.In this paper, the performance of asymmetric self-cascode (A-SC) fully depleted silicon-on-insulator n-channel metal-oxide-semiconductor field-effect transistors ...

High performance analog operation of double gate transistors with the graded-channel architecture at low temperatures

Pavanello M.A.; Martino J.A.; Raskin J.-P.; Flandre D. (2005)

This work studies the use of channel engineering by means of graded-channel profile on double gate SOI MOSFETs for improving the analog performance and comparing their output characteristics with conventional double gate ...