Search

Now showing items 1-10 of 18

Analysis of source-follower buffers implemented with graded-channel SOI nMOSFETs operating at cryogenic temperatures

de Souza M.; Flandre D.; Pavanello M.A. (2009)

This work studies the operation of source-follower buffers implemented with standard and graded-channel (GC) fully depleted (FD) SOI nMOSFETs at low temperatures. The analysis is performed by comparing the voltage gain of ...

Cryogenic operation of graded-channel silicon-on-insulator nMOSFETs for high performance analog applications

Pavanello M.A.; Der Agopian P.G.; Martino J.A.; Flandre D. (2006)

We present in this work an analysis of the low temperature operation of Graded-Channel fully depleted Silicon-On-Insulator (SOI) nMOSFETs for analog applications, in the range of 100-300 K. This analysis is supported by a ...

Evaluation of graded-channel SOI MOSFET operation at high temperatures

Galeti M.; Pavanello M.A.; Martino J.A. (2006)

This paper presents a comparative analysis between graded-channel (GC) and conventional fully depleted SOI MOSFETs devices operating at high temperatures (up to 300 °C). The electrical characteristics such as threshold ...

Advantages of graded-channel SOI nMOSFETs for application as source-follower analog buffer

de Souza M.; Flandre D.; Pavanello M.A. (2008)

In this work the performance of graded-channel (GC) SOI MOSFETs operating as source-follower buffers is presented. The experimental analysis is performed by comparing the gain and linearity of buffers implemented with GC ...

Analysis of temperature-induced saturation threshold voltage degradation in deep-submicrometer ultrathin SOI MOSFETs

Pavanello M.A.; Martino J.A.; Simoen E.; Claeys C. (2005)

This paper presents a systematic study of the temperature lowering influence on the saturation threshold voltage degradation in ultrathin deep-submicrometer fully depleted silicon-on-insulator (SOI) MOSFETs. It is observed ...

Advantages of the graded-channel SOI FD MOSFET for application as a quasi-linear resistor

Cerdeira A.; Aleman M.A.; Pavanello M.A.; Martino J.A.; Vancaillie L.; Flandre D. (2005)

In this paper, we analyze the previously unexpected advantages of asymmetric channel engineering on the MOS resistance behavior in quasi-linear operation, such as used in integrated continuous-time tunable filters. The ...

Low temperature influence on the uniaxially strained FD SOI nMOSFETs behavior

de Souza M.; Pavanello M.A.; Martino J.A.; Simoen E.; Claeys C. (2007)

This work presents the impact of low temperature operation on the characteristics of uniaxially strained fully-depleted SOI nMOSFETs. Devices with channel lengths down to 160 nm were explored in the range 100-380 K. The ...

Analysis of uniaxial and biaxial strain impact on the linearity of fully depleted SOI nMOSFETs

Pavanello M.A.; Martino J.A.; Simoen E.; Claeys C. (2007)

This work studies the impact of uniaxial, biaxial and combined uniaxial-biaxial strain on the linearity of nMOSFETs from a 65 nm fully depleted (FD) SOI technology. The total harmonic distortion (THD) and third-order ...

Cryogenic operation of FinFETs aiming at analog applications

Pavanello M.A.; Martino J.A.; Simoen E.; Claeys C. (2009)

FinFETs are recognized as promising candidates for the CMOS nanometer era. In this paper the most recent results for cryogenic operation of FinFETs will be demonstrated with special emphasis on analog applications. Threshold ...

The low-frequency noise behaviour of graded-channel SOI nMOSFETs

Simoen E.; Claeys C.; Chung T.M.; Flandre D.; Pavanello M.A.; Martino J.A.; Raskin J.-P. (2007)

It is shown that the low-frequency noise in graded-channel (GC) SOI nMOSFETs is generally of the flicker or 1/f noise type. The corresponding input-referred noise spectral density is markedly higher than for the conventional ...