| dc.contributor.author | Duron-Rosales, Ismael | |
| dc.contributor.author | Rangel-Patiño, Francisco E. | |
| dc.contributor.author | Rayas-Sánchez, José E. | |
| dc.contributor.author | Chávez-Hurtado, José L. | |
| dc.contributor.author | Hakim, Nagib | |
| dc.date.accessioned | 2019-08-29T20:22:54Z | |
| dc.date.accessioned | 2023-03-10T18:11:58Z | |
| dc.date.available | 2019-08-29T20:22:54Z | |
| dc.date.available | 2023-03-10T18:11:58Z | |
| dc.date.issued | 2017-06 | |
| dc.identifier.citation | . Duron-Rosales, F. E. Rangel-Patiño, J. E. Rayas-Sánchez, J. L. Chávez-Hurtado and N. Hakim, "Reconfigurable FIR filter coefficient optimization in post-silicon validation to improve eye diagram for optical interconnects," 2017 International Caribbean Conference on Devices, Circuits and Systems (ICCDCS), Cozumel, 2017, pp. 85-88. doi: 10.1109/ICCDCS.2017.7959697 | es |
| dc.identifier.issn | 2165-3550 | |
| dc.identifier.uri | https://hdl.handle.net/20.500.12032/71491 | |
| dc.description | Enhanced small form-factor pluggable (SFP+) is a specification for a new generation of optical modular transceivers. The devices are designed for use with small form factor (SFF) connectors, and offer high speed and physical compactness. SFP+ modules require high-quality ASIC/SerDes transmitters (Tx) because IEEE and fibre channel standards place strict requirements on the optical interface, and linear/limiting SFP+ module types have Tx paths that do not correct for timing jitter. This introduces a design challenge to guarantee performance over process, temperature, and voltage (PVT) conditions. Adjusting the Tx equalization across PVT and different interconnect channels can be a time-consuming task in post-silicon validation. In order to overcome this problem, this paper proposes a direct optimization method based on a suitable objective function formulation to efficiently tune the Tx equalizer and optimize the eye diagram to successfully comply with industrial specifications. | es |
| dc.language.iso | eng | es |
| dc.publisher | IEEE | es |
| dc.rights.uri | http://quijote.biblio.iteso.mx/licencias/CC-BY-NC-ND-2.5-MX.pdf | es |
| dc.subject | Equalization | es |
| dc.subject | Ethernet | es |
| dc.subject | Eye Diagram | es |
| dc.subject | FIR | es |
| dc.subject | HSIO | es |
| dc.subject | ISI | es |
| dc.subject | Optimization | es |
| dc.subject | Post-silicon Validation | es |
| dc.subject | Signal Integrity | es |
| dc.subject | SFP | es |
| dc.subject | Tuning | es |
| dc.subject | Transmitter | es |
| dc.title | Reconfigurable FIR Filter Coefficient Optimization in Post-Silicon Validation to Improve Eye Diagram for Optical Interconnects | es |
| dc.type | info:eu-repo/semantics/article | es |
