Reconfigurable FIR Filter Coefficient Optimization in Post-Silicon Validation to Improve Eye Diagram for Optical Interconnects

Duron-Rosales, Ismael; Rangel-Patiño, Francisco E.; Rayas-Sánchez, José E.; Chávez-Hurtado, José L.; Hakim, Nagib

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Date

2017-06

Author

Duron-Rosales, Ismael

Rangel-Patiño, Francisco E.

Rayas-Sánchez, José E.

Chávez-Hurtado, José L.

Hakim, Nagib

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URI

https://hdl.handle.net/20.500.12032/71491

Description

Enhanced small form-factor pluggable (SFP+) is a specification for a new generation of optical modular transceivers. The devices are designed for use with small form factor (SFF) connectors, and offer high speed and physical compactness. SFP+ modules require high-quality ASIC/SerDes transmitters (Tx) because IEEE and fibre channel standards place strict requirements on the optical interface, and linear/limiting SFP+ module types have Tx paths that do not correct for timing jitter. This introduces a design challenge to guarantee performance over process, temperature, and voltage (PVT) conditions. Adjusting the Tx equalization across PVT and different interconnect channels can be a time-consuming task in post-silicon validation. In order to overcome this problem, this paper proposes a direct optimization method based on a suitable objective function formulation to efficiently tune the Tx equalizer and optimize the eye diagram to successfully comply with industrial specifications.

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