Buscar
Mostrando ítems 1-6 de 6
Analysis of Mobility in Graded-Channel SOI Transistors aiming at Circuit Simulation
(2020-07-31)
This work presents an analysis of the behavior of the effective mobility of graded-channel FD SOI transistors us-ing an Y-Function-based technique. Low field mobility, linear and quadratic attenuation factors were extracted ...
Temperature, Silicon Thickness and Intrinsic Length Influence on the Operation of Lateral SOI PIN Photodiodes
(2020-08-11)
This work presents an analysis of the influence of
intrinsic length region and the thickness of the silicon film on
the performance of lateral thin-film SOI PIN (Silicon on insulator
P-I-N photodiodes) when illuminated ...
Experimental Assessment of Variability in Junctionless Nanowire nMOS Transistors
(2021-09-06)
In this work, experimental assessment of the variability of threshold voltage and drain current in junctionless nanowire n MOS transistors is presented. Die-to-die variability of threshold voltage and drain current is ...
Comparative Analysis of Transcapacitances in Asymmetric Self-Cascode and Graded-Channel SOI nMOSFETs
(2022-07-04)
© 2022 IEEE.This work presents a comparative study of the transcapacitances of asymmetric self-cascode (A-SC) and graded-channel (GC) silicon-on-insulator (SOI) nMOSFETs, by means of two-dimensional numerical simulations. ...
Performance of SOI Ω-Gate Nanowires from Cryogenic to High Temperatures
(2022-09-17)
© 2022, Brazilian Microelectronics Society. All rights reserved.—This review paper presents the electrical characteristics of Silicon-On-Insulator Ω-Gate nanowires in a wide range of temperatures. The operation in cryogenic ...