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A physically-based threshold voltage definition, extraction and analytical model for junctionless nanowire transistors
(2013)
This work proposes a physically-based definition for the threshold voltage, VTH, of junctionless nanowire transistors and a methodology to extract it. The VTH is defined as the point of equal magnitude for the drift and ...
Charge-based continuous model for long-channel Symmetric Double-Gate Junctionless Transistors
(2013)
A new charge-based continuous model for long-channel Symmetric Double-Gate Junctionless Transistors (SDGJLTM) is proposed and validated with simulations for doping concentrations of 5 × 1018 and 1 × 10 19 cm-3, as well as ...
Asymmetric channel doping profile and temperature reduction influence on the performance of current mirrors implemented with FD SOI nMOSFETs
(2013)
In this work a comparison between the performance of current mirrors implemented with uniformly doped and graded-channel (GC) transistors operating down to low temperature (150 K) is presented. This analysis has been carried ...
Trap density characterization through low-frequency noise in junctionless transistors
(2013)
This work evaluates, for the first time, the trap density of Junctionless Nanowire Transistors (JNTs) of two technologies produced with different gate dielectrics through the low-frequency noise (LFN) characterization. ...
Approximate analytical expression for the tersminal voltage in multi-exponential diode models
(2013)
We propose a simple approximate solution for the terminal voltage as an explicit function of the terminal current for diodes which need to be modeled by two or more ideal diodes in parallel. As a result, this solution is ...