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dc.contributor.advisorKrug, Margrit Reni
dc.contributor.authorJaeger, Gabriel Antônio
dc.date.accessioned2020-02-17T13:55:57Z
dc.date.accessioned2022-09-22T19:39:07Z
dc.date.available2020-02-17T13:55:57Z
dc.date.available2022-09-22T19:39:07Z
dc.date.issued2019-11-06
dc.identifier.urihttps://hdl.handle.net/20.500.12032/63397
dc.description.abstractThe qualification of the manufacturing process can guarantee the desired quality and reliability of the products produced. For this, it is essential to understand the functional behavior of electronic components and the main characteristics of their failures. On the other hand, the constant technological advancement and the increase in the complexity of the devices adds difficulty in the test steps, because with the increase of memory density and data speed rate, besides the increasingly complex structures, the challenges related to the applied test strategies, while imposing the need for a thorough knowledge of the developed devices. In addition, the constant evolution of the Brazilian market in the semiconductor sector presents an even greater need for process improvement and industrial level testing capabilities, in order to add value, quality and generate competitiveness with the international market. Based on this context, the objective of this work is the development and validation of a functional electrical memory test program for use in a high performance industrial Automatic Test Equipment (ATE), and later a comparative analysis between the developed test solution and a benchtop tester (Turbocats TCE3200LP). The target devices of this work are the DDR4 SDRAM memories. The test platform used in the project was Teradyne’s ATE Magnum V, for which one the test program was developed, which used some of the main memory testing algorithms found in the literature and suitable for SDRAM memory testing. The functional validation of the test development, as well as the comparative analysis, was performed through the results adherence analysis between failures detected by the ATE test program and the failures detected through the existing algorithms in the TCE3200LP platform. The adherence level of the results between the developed test solution and the bench testers was 47%. However, the adherence between the ATE test and the selected samples was approximately 80%, showing greater similarity with the actual condition of each sample compared to the result obtained by the TCE2300LP. In other words, the failure coverage index of the developed test solution yields better results than the TCE3200LP bench tester solution and is an interesting alternative for use in fault analysis and defect characterization.en
dc.description.sponsorshipNenhumapt_BR
dc.languagept_BRpt_BR
dc.publisherUniversidade do Vale do Rio dos Sinospt_BR
dc.rightsopenAccesspt_BR
dc.subjectMemórias SDRAM DDR4pt_BR
dc.subjectSDRAM DDR4 Memoriesen
dc.titleDesenvolvimento e análise comparativa de soluções para teste funcional de memória DRAM em testador automático industrial versus testador manual de bancadapt_BR
dc.typeDissertaçãopt_BR


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