| dc.contributor.author | Giacomini R. | |
| dc.contributor.author | Martino J.A. | |
| dc.date.accessioned | 2019-08-19T23:45:24Z | |
| dc.date.accessioned | 2023-05-03T20:37:16Z | |
| dc.date.available | 2019-08-19T23:45:24Z | |
| dc.date.available | 2023-05-03T20:37:16Z | |
| dc.date.issued | 2006 | |
| dc.identifier.citation | GIACOMINI, R.;RENATO GIACOMINI;R. C. GIACOMINI;RENATO CAMARGO GIACOMINI;Giacomini, R;Giacomini, R. C.;GIACOMINI, RENATO;GIACOMINI, RENATO C.;GIACOMINI, RENATO CAMARGO;GIACOMINI, R C; MARTINO, J. A.. Modeling Silicon on Insulator MOS Transistor with Nonrectangular-Gate Layouts. Journal of the Electrochemical Society, v. 153, n. 3, p. 218-222, 2006. | |
| dc.identifier.issn | 0013-4651 | |
| dc.identifier.uri | https://hdl.handle.net/20.500.12032/89352 | |
| dc.description.abstract | This work presents a new and simple approach for modeling silicon on insulator metal-oxide-semiconductor (MOS) dc characteristics for nonrectangular layout devices, based on decomposition of the original shape into trapezoidal parts and on an accurate but simple model of the trapezoidal layout transistor. Analytical expressions relating geometrical parameters and terminal current and voltages are presented for several shapes, such as L, U, T, and S, and other well-known devices such as the edgeless transistor and the asymmetric trapezoidal gate transistor. The proposed closed-form analytical expressions show good agreement with measured data and three-dimensional simulation results. © 2006 The Electrochemical Society. All rights reserved. | |
| dc.relation.ispartof | Journal of the Electrochemical Society | |
| dc.rights | Acesso Restrito | |
| dc.title | Modeling silicon on insulator MOS transistors with nonrectangular-gate layouts | |
| dc.type | Artigo | |
