A Customized Genetic Algorithm with In-Loop Robustness Analyses to Boost the Optimization Process of Analog CMOS ICs

Abstract

The traditional optimization processes of analog complementary metal-oxide-semiconductor (CMOS) integrated circuits (ICs) are very complex, slow, and based on the designers’ experience. To obtain robust potential solutions, it is necessary to perform robustness analyses (RAs) through SPICE simulations. However, this approach represents a huge bottleneck in the optimization processes due to the significant increase of time of the SPICE simulations concerning the RAs. Therefore, this work proposes an innovative customized genetic algorithm (GA) to boost the optimization process of analog CMOS ICs. The main results obtained showed that all designs of analog CMOS ICs reached a yield of 100% and a remarkable reduction of the optimization time (from 23% to 79%) in comparison with the standard optimization process with the GA, without reducing the random samples number considered in the RAs, and consequently preserving their robustness accuracy.