Drain Current and Short Channel Effects Modeling in Junctionless Nanowire Transistors
| dc.contributor.author | TREVISOLI, Renan D. | |
| dc.contributor.author | DORIA, Rodrigo Trevisoli | |
| dc.contributor.author | DE SOUZA, MICHELLY | |
| dc.contributor.author | PAVANELLO, Marcelo Antonio | |
| dc.date.accessioned | 2019-08-19T23:45:16Z | |
| dc.date.accessioned | 2023-05-03T20:33:46Z | |
| dc.date.available | 2019-08-19T23:45:16Z | |
| dc.date.available | 2023-05-03T20:33:46Z | |
| dc.date.issued | 2013 | |
| dc.identifier.citation | TREVISOLI, Renan D.; DORIA, Rodrigo Trevisoli; DE SOUZA, MICHELLY; PAVANELLO, Marcelo Antonio. Drain Current and Short Channel Effects Modeling in Junctionless Nanowire Transistors. JICS. Journal of Integrated Circuits and Systems (Ed. Português), v. 8, n. 2, p. 116-124, 2013. | |
| dc.identifier.issn | 1807-1953 | |
| dc.identifier.uri | https://hdl.handle.net/20.500.12032/88682 | |
| dc.relation.ispartof | JICS. Journal of Integrated Circuits and Systems (Ed. Português) | |
| dc.rights | Acesso Restrito | |
| dc.title | Drain Current and Short Channel Effects Modeling in Junctionless Nanowire Transistors | pt_BR |
| dc.type | Artigo | pt_BR |
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