| dc.contributor.author | Trevisoli R. | |
| dc.contributor.author | Doria R.T. | |
| dc.contributor.author | De Souza M. | |
| dc.contributor.author | Pavanello M.A. | |
| dc.date.accessioned | 2019-08-19T23:45:13Z | |
| dc.date.accessioned | 2023-05-03T20:33:12Z | |
| dc.date.available | 2019-08-19T23:45:13Z | |
| dc.date.available | 2023-05-03T20:33:12Z | |
| dc.date.issued | 2014 | |
| dc.identifier.citation | TREVISOLI, Renan Doria; DORIA, Rodrigo Trevisoli; DE SOUZA, Michelly; PAVANELLO, Marcelo A.. Substrate Bias Influence on the Operation of Junctionless Nanowire Transistors. IEEE Transactions on Electron Devices, v. 61, n. 5, p. 1575-1582, 2014. | |
| dc.identifier.issn | 0018-9383 | |
| dc.identifier.uri | https://hdl.handle.net/20.500.12032/88574 | |
| dc.description.abstract | The aim of this paper is to analyze the substrate bias influence on the operation of junctionless nanowire transistors based on 3-D simulated and experimental results, accomplished by modeled data. The threshold voltage, the maximum transconductance, the subthreshold slope, the drain-induced barrier lowering (DIBL), and the ION/IOFF ratio are the key parameters under analysis. It has been shown that the negative back bias can reduce the short-channel effects occurrence, improving the ION/ OFF ratio and DIBL. © 1963-2012 IEEE. | |
| dc.relation.ispartof | IEEE Transactions on Electron Devices | |
| dc.rights | Acesso Restrito | |
| dc.title | Substrate bias influence on the operation of junctionless nanowire transistors | |
| dc.type | Artigo | |
