| dc.contributor.author | Lomelí-Illescas, Ismael | |
| dc.contributor.author | Solís-Bustos, Sergio A. | |
| dc.contributor.author | Rayas-Sánchez, José E. | |
| dc.date.accessioned | 2019-08-30T18:29:25Z | |
| dc.date.accessioned | 2023-03-21T21:08:39Z | |
| dc.date.available | 2019-08-30T18:29:25Z | |
| dc.date.available | 2023-03-21T21:08:39Z | |
| dc.date.issued | 2017-03 | |
| dc.identifier.citation | I. Lomelí-Illescas, S. A. Solís-Bustos, and J. E. Rayas-Sánchez, “Analysis of the implications of stacked devices in nano-scale technologies for analog applications,” in IEEE Latin American Test Symp. (LATS-2017), Bogota, Colombia, Mar. 2017, pp. 1-4. DOI: 10.1109/LATW.2017.7906750 | es |
| dc.identifier.issn | 2373-0862 | |
| dc.identifier.uri | https://hdl.handle.net/20.500.12032/75602 | |
| dc.description | In this work, a methodology to assess the implications on the performance of analog circuits due to the use of stacked devices in current nano-scale technologies is presented. To evaluate the usage of stacked devices, the characteristic curves of transistors implemented with a different amount of transistors in stack are obtained and compared to those of a single device. The effects of using stacked devices are further studied with the implementation of a current mirror and the implementation of two different layout topologies, discussing their tradeoffs, advantages and drawbacks. Our methodology facilitates designers to develop a good understanding of the characteristics and limitations of a particular physical design before silicon is back for laboratory testing. | es |
| dc.language.iso | eng | es |
| dc.publisher | IEEE | es |
| dc.rights.uri | http://quijote.biblio.iteso.mx/licencias/CC-BY-NC-ND-2.5-MX.pdf | es |
| dc.subject | Analog Layout | es |
| dc.subject | Channel Modulation | es |
| dc.subject | Interdigitated Layout | es |
| dc.subject | Leakage | es |
| dc.subject | Stacked Devices | es |
| dc.subject | Stack Effect | es |
| dc.title | Analysis of the Implications of Stacked Devices in Nano-Scale Technologies for Analog Applications | es |
| dc.type | info:eu-repo/semantics/article | es |
