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dc.contributor.advisorDomínguez-Pérez, Luis J.
dc.contributor.authorArizaga-Jasso, Adriana
dc.date.accessioned2022-04-22T21:32:54Z
dc.date.accessioned2023-03-21T18:36:05Z
dc.date.available2022-04-22T21:32:54Z
dc.date.available2023-03-21T18:36:05Z
dc.date.issued2021-07
dc.identifier.citationArizaga-Jasso, A. (2021). Montgomery Algorithm Implementation on an Embedded System for a 256-bit Input Size. Trabajo de obtención de grado, Especialidad en Sistemas Embebidos. Tlaquepaque, Jalisco: ITESO.es_MX
dc.identifier.urihttps://hdl.handle.net/20.500.12032/74463
dc.descriptionThe Montgomery multiplication is a leading method to compute modular multiplications faster over large prime fields. Numerous algorithms in number theory use Montgomery multiplication computations. This fast data processing makes it appealing to cryptosystem analysis. The objective of this work is to implement the Montgomery algorithm on an embedded system. For this application, the following 256-bit arithmetic functions were executed in the MCUXpresso IDE software: adder, subtraction, multiplication, and Barret reduction. The obtained results in the FRDM-K64F board show the Montgomery form values, and the product out of the Montgomery domain. The operations computed in the embedded board also demonstrate that the applied algorithms are congruent with the values obtained in C programming, Python, and the FRDM-K64F board.es_MX
dc.description.sponsorshipITESO, A. C.es
dc.language.isoenges_MX
dc.publisherITESOes_MX
dc.rights.urihttp://quijote.biblio.iteso.mx/licencias/CC-BY-NC-2.5-MX.pdfes_MX
dc.subjectMontgomery Algorithmes_MX
dc.subjectModular Arithmetices_MX
dc.subjectBarret Reductiones_MX
dc.subjectArithmetices_MX
dc.titleMontgomery Algorithm Implementation on an Embedded System for a 256-bit Input Sizees_MX
dc.typeinfo:eu-repo/semantics/academicSpecializationes_MX


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