| dc.contributor.author | Gómez-Cruz, Jorge | |
| dc.contributor.author | Sánchez-Hernández, Fernando | |
| dc.contributor.author | Gómez-Mora, Luis Guillermo | |
| dc.contributor.author | Juárez-Hernández, Esdras | |
| dc.contributor.author | Martínez-Guerrero, Esteban | |
| dc.date.accessioned | 2013-06-10T14:46:49Z | |
| dc.date.accessioned | 2023-03-21T17:12:25Z | |
| dc.date.available | 2013-06-10T14:46:49Z | |
| dc.date.available | 2023-03-21T17:12:25Z | |
| dc.date.issued | 2012-03 | |
| dc.identifier.citation | Gomez-Cruz Jorge de Jesus, Design of a programmable CMOS Charge-Pump for phase-locked loop synthesizers, Procedia Technology 3 ( 2012 ) pp 235 – 240. | es |
| dc.identifier.issn | 2212-0173 | |
| dc.identifier.uri | https://hdl.handle.net/20.500.12032/73900 | |
| dc.description | A charge pump circuit capable of operating at different switching speed is presented. The switching speed control is added to a typical charge pump circuit by mean of enable switches which allow drive different currents. Charge pump circuit is implemented in AMI 0.5µm CMOS technology. Simulations were performed using Spectre from CadenceTM. Simulation results show clearly an increase in the slope of charging or discharging curves of load capacitor during the pumping-up and pumping-down phases. | es |
| dc.description.sponsorship | ITESO, A.C. | es |
| dc.language.iso | eng | es |
| dc.publisher | Procedia Technology | es |
| dc.relation.ispartofseries | Procedia technolgy;3 | |
| dc.rights.uri | http://quijote.biblio.iteso.mx/licencias/CC-BY-NC-ND-2.5-MX.pdf | es |
| dc.subject | Analog Electronic Design | es |
| dc.subject | Integrated Circuits; Charge Pump | es |
| dc.subject | PLLs | es |
| dc.subject | Circuit Simulation | es |
| dc.title | Design of a programmable CMOS Charge-Pump for phase-locked loop synthesizers | es |
| dc.type | info:eu-repo/semantics/article | es |
