| dc.contributor.author | Rangel-Patiño, Francisco E. | |
| dc.contributor.author | Chávez-Hurtado, José L. | |
| dc.contributor.author | Viveros-Wacher, Andrés | |
| dc.contributor.author | Rayas-Sánchez, José E. | |
| dc.contributor.author | Hakim, Nagib | |
| dc.date.accessioned | 2019-07-23T18:36:16Z | |
| dc.date.accessioned | 2023-03-21T16:19:15Z | |
| dc.date.available | 2019-07-23T18:36:16Z | |
| dc.date.available | 2023-03-21T16:19:15Z | |
| dc.date.issued | 2017-10 | |
| dc.identifier.citation | F. E. Rangel-Patiño, J. L. Chávez-Hurtado, A. Viveros-Wacher, J. E. Rayas-Sánchez, and N. Hakim, “Eye diagram system margining surrogate-based optimization in a server silicon validation platform,” in European Microwave Conf. (EuMC-2017), Nuremberg, Germany, Oct. 2017, pp. 540-543. | es |
| dc.identifier.isbn | 978-1-5386-3964-1 | |
| dc.identifier.uri | https://hdl.handle.net/20.500.12032/73425 | |
| dc.description | Exhaustive enumeration methods for the physical layer (PHY) tuning of high-speed input/output (HSIO) links are prohibitive under current silicon server time-to-market (TTM) commitments. An alternative is to perform optimization on a highly accurate surrogate model. However, to increase the accuracy of the model, the number of lab measurements required to derive it also increases. In this paper, we analyze several surrogate modeling methods and design of experiments techniques to find the coarse model that is capable of approximating the real system behavior without requiring a large amount of actual measurements. We perform a direct optimization on the best coarse models found and verify the response by measuring the real system at the optimal coarse model solution. | es |
| dc.language.iso | eng | es |
| dc.publisher | EuMA | es |
| dc.rights.uri | http://quijote.biblio.iteso.mx/licencias/CC-BY-NC-ND-2.5-MX.pdf | es |
| dc.subject | Equalization | es |
| dc.subject | Eye Diagram | es |
| dc.subject | High-speed Interconnects | es |
| dc.subject | HSIO | es |
| dc.subject | Kriging | es |
| dc.subject | Neural Network | es |
| dc.subject | Optimization | es |
| dc.subject | Polynomial | es |
| dc.subject | Post-silicon Validation | es |
| dc.subject | Receiver | es |
| dc.subject | Signal Integrity | es |
| dc.subject | Support Vector Machines | es |
| dc.subject | Surrogate Models | es |
| dc.subject | USB3 | es |
| dc.subject | DoE | es |
| dc.title | Eye Diagram System Margining Surrogate-Based Optimization in a Server Silicon Validation Platform | es |
| dc.type | info:eu-repo/semantics/conferencePaper | es |
