| dc.contributor.author | Ruiz-Urbina, Roberto J. | |
| dc.contributor.author | Rangel-Patiño, Francisco E. | |
| dc.contributor.author | Rayas-Sánchez, José E. | |
| dc.contributor.author | Vega-Ochoa, Édgar A. | |
| dc.contributor.author | Longoria-Gándara, Omar | |
| dc.date.accessioned | 2022-03-14T22:54:47Z | |
| dc.date.accessioned | 2023-03-21T15:35:31Z | |
| dc.date.available | 2022-03-14T22:54:47Z | |
| dc.date.available | 2023-03-21T15:35:31Z | |
| dc.date.issued | 2021-05 | |
| dc.identifier.citation | R.J. Ruiz-Urbina, F.E. Rangel-Patiño, J.E. Rayas-Sánchez, E. A. Vega-Ochoa and O. Longoria-Gándara, “Transmitter and receiver equalizers optimization for PCI Express Gen6.0 based on PAM4,” in IEEE MTT-S Latin America Microwave Conf. (LAMC-2021), Cali, Colombia, May 2021, pp. 1-4. DOI: 10.1109/LAMC50424.2021.9601893 | es_MX |
| dc.identifier.isbn | 978-1-7281-9359-5 | |
| dc.identifier.uri | https://hdl.handle.net/20.500.12032/73295 | |
| dc.description | The continuously increasing bandwidth demand from new applications has led to the development of the new PCIe Gen6, reaching data rates of 64 GT/s and adopting PAM4 modulation scheme. While PAM4 solves the bandwidth constraint in high-speed interconnects, it brings new challenges for the physical channel analysis. Equalization (EQ) plays an important role even with PAM4 signaling. PCIe specification defines requirements to perform EQ at the transmitter (Tx) and at the receiver (Rx). During the EQ process, one combination of Tx/Rx EQ coefficients must be selected to meet the performance requirements of the system. Testing all possible coefficient combinations is prohibitive. Current industrial practice consists of finding a subset of combinations at post-silicon validation using maps of EQ coefficients. Finding this subset of coefficients is timeconsuming,along with all the new challenges imposed by PAM4. In this paper, we propose an optimization approach for PCIe Gen6 link EQ. Our proposal is based on a suitable objective function formulated over the channel operating margin (COM), which is a new figure of merit (FOM) adopted by standards of communications for signaling speeds beyond 25 Gbps. | es_MX |
| dc.description.sponsorship | ITESO, A.C. | es_MX |
| dc.language.iso | eng | es_MX |
| dc.publisher | IEEE | es_MX |
| dc.rights.uri | http://quijote.biblio.iteso.mx/licencias/CC-BY-NC-ND-2.5-MX.pdf | es_MX |
| dc.subject | Channel | es_MX |
| dc.subject | COM | es_MX |
| dc.subject | CTLE | es_MX |
| dc.subject | Equalization Maps | es_MX |
| dc.subject | Eye-diagram | es_MX |
| dc.subject | FIR | es_MX |
| dc.subject | ISI | es_MX |
| dc.subject | Jitter | es_MX |
| dc.subject | NRZ | es_MX |
| dc.subject | Optimization | es_MX |
| dc.subject | PAM4 | es_MX |
| dc.subject | PCIe | es_MX |
| dc.subject | Post-silicon Validation | es_MX |
| dc.subject | Receiver | es_MX |
| dc.subject | Transmitter | es_MX |
| dc.title | Transmitter and receiver equalizers optimization for PCI Express Gen6.0 based on PAM4 | es_MX |
| dc.type | info:eu-repo/semantics/article | es_MX |
