| dc.contributor.author | Rayas-Sánchez, José E. | |
| dc.contributor.author | Vargas-Chávez, Noel | |
| dc.date.accessioned | 2013-05-21T19:14:23Z | |
| dc.date.accessioned | 2023-03-10T16:53:55Z | |
| dc.date.available | 2013-05-21T19:14:23Z | |
| dc.date.available | 2023-03-10T16:53:55Z | |
| dc.date.issued | 2010-10 | |
| dc.identifier.citation | J. E. Rayas-Sánchez and N. Vargas-Chávez, “Design optimization of microstrip lines with via fences through surrogate modeling based on polynomial functional interpolants,” in IEEE Conf. Electrical Performance of Electronic Packaging and Systems (EPEPS 2010), Austin, TX, Oct. 2010, pp. 125-128. (E-ISBN: 978-1-4244-6866-9; P-ISBN: 978-1-4244-6865-2; INSPEC: 11664332) | es |
| dc.identifier.uri | https://hdl.handle.net/20.500.12032/69089 | |
| dc.description | A common technique to reduce crosstalk between
microstrip lines consists of using via fences or guard traces.
However, via fences may significantly increase the amount of
reflections at the signaling microstrip lines. We propose an EMbased
design optimization method to achieve reduction of
crosstalk and transmission losses by the use of via fences without
a significant deterioration of impedance matching at the
signaling microstrip lines. Our method exploits surrogate models
using polynomial-based functional interpolants. We start from a
zero-order model that is as simple as a fixed EM model response.
This zero-order model is enhanced by multidimensional
polynomial interpolants around a reference base point in the
design space. The polynomial approximation is a function of the
design variables, and it is used to interpolate highly accurate EM
responses in a region of interest around the selected base point.
Global optimum values for the surrogate model weighting factors
are efficiently obtained in closed form. By optimizing the
surrogate model, we efficiently find an optimal performance for
the microstrip lines with via fences.
Index Terms — Crosstalk, microstrip | es |
| dc.description.sponsorship | ITESO, A.C. | es |
| dc.description.sponsorship | Consejo Nacional de Ciencia y Tecnología | es |
| dc.language.iso | eng | es |
| dc.publisher | IEEE Conf. Electrical Performance of Electronic Packaging and Systems | es |
| dc.relation.ispartofseries | IEEE Conf. Electrical Performance of Electronic Packaging and Systems (EPEPS);2010 | |
| dc.rights.uri | http://quijote.biblio.iteso.mx/licencias/CC-BY-NC-ND-2.5-MX.pdf | es |
| dc.subject | Crosstalk | es |
| dc.subject | Microstrip Via Fences | es |
| dc.subject | Guard Traces | es |
| dc.subject | High-speed Interconnects | es |
| dc.subject | Signal Integrity | es |
| dc.subject | Surrogate Modeling | es |
| dc.subject | Space Mapping | es |
| dc.subject | Electromagnetic Based Optimization | es |
| dc.title | Design optimization of microstrip lines with via fences through surrogate modeling based on polynomial functional interpolants | es |
| dc.type | info:eu-repo/semantics/conferencePaper | es |
