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dc.contributor.authorDoria R.T.
dc.contributor.authorTrevisoli R.D.
dc.contributor.authorDe Souza M.
dc.contributor.authorPavanello M.A.
dc.date.accessioned2019-08-19T23:45:10Z
dc.date.available2019-08-19T23:45:10Z
dc.date.issued2013
dc.identifier.citationDORIA, R. T.; TREVISOLI, Renan Doria; DE SOUZA, Michelly; Pavanello, Marcelo Antonio. Trap density characterization through low-frequency noise in junctionless transistors. Microelectronic Engineering, v. 109, p. 79-82, 2013.
dc.identifier.issn0167-9317
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1099
dc.description.abstractThis work evaluates, for the first time, the trap density of Junctionless Nanowire Transistors (JNTs) of two technologies produced with different gate dielectrics through the low-frequency noise (LFN) characterization. Along the work, the LFN resultant from both devices was compared in linear and saturation regimes for different gate biases, showing that these devices can exhibit either 1/f or Lorentzian as the dominant noise source depending on the technology and gate bias. Such analysis showed that devices with SiO2 gate dielectric have presented only one corner frequency over the whole frequency range whereas two corner frequencies with different time constants could be observed in devices with HfSiON gate dielectric. The trap density of both devices showed to be similar to the values reported for inversion mode devices in different recent papers, in the order of 1016 cm-3 eV-1 and 1019 cm-3 eV-1, for SiO2 and HfSiON gate dielectrics, respectively.© 2013 Elsevier B.V.All rights reserved.
dc.relation.ispartofMicroelectronic Engineering
dc.rightsAcesso Restrito
dc.titleTrap density characterization through low-frequency noise in junctionless transistors
dc.typeArtigo


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