Show simple item record

dc.contributor.authorGimenez S.P.
dc.contributor.authorGalembeck E.H.S.
dc.contributor.authorRenaux C.
dc.contributor.authorFlandre D.
dc.date.accessioned2019-08-19T23:45:30Z
dc.date.available2019-08-19T23:45:30Z
dc.date.issued2015
dc.identifier.citationGimenez, Salvador Pinillos; GALEMBECK, EGON HENRIQUE SALERNO; RENAUX, CHRISTIAN; FLANDRE, Denis. Diamond layout style impact on SOI MOSFET in high temperature environment. Microelectronics and Reliability, v. 55, n. 5, p. 783/MR11492-788, 2015.
dc.identifier.issn0026-2714
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1318
dc.description.abstract© 2015 Elsevier Ltd.This work performs an experimental comparative study between the Diamond (hexagonal gate geometry) and Standard layouts styles for Metal-Oxide-Semiconductor Field Effect Transistor in high temperatures environment. The devices were manufactured with the 1 μm Silicon-on-Insulator CMOS technology. The results demonstrate that the Diamond SOI MOSFET is capable to keep active the Longitudinal Corner Effect and the Parallel Association of MOSFET with Different Channel Lengths Effect in high temperature conditions and consequently to continue presenting a better electrical performance than the one found in the conventional SOI MOSFET.
dc.relation.ispartofMicroelectronics Reliability
dc.rightsAcesso Restrito
dc.titleDiamond layout style impact on SOI MOSFET in high temperature environment
dc.typeArtigo de evento


Files in this item

FilesSizeFormatView

This item appears in the following Collection(s)

Show simple item record


© AUSJAL 2022

Asociación de Universidades Confiadas a la Compañía de Jesús en América Latina, AUSJAL
Av. Santa Teresa de Jesús Edif. Cerpe, Piso 2, Oficina AUSJAL Urb.
La Castellana, Chacao (1060) Caracas - Venezuela
Tel/Fax (+58-212)-266-13-41 /(+58-212)-266-85-62

Nuestras redes sociales

facebook Facebook

twitter Twitter

youtube Youtube

Asociaciones Jesuitas en el mundo
Ausjal en el mundo AJCU AUSJAL JESAM JCEP JCS JCAP