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dc.contributor.authorDoria R.T.
dc.contributor.authorDe Souza M.A.S.
dc.contributor.authorMartino J.A.
dc.contributor.authorSimoen E.
dc.contributor.authorClaeys C.
dc.contributor.authorPavanello M.A.
dc.date.accessioned2019-08-19T23:45:11Z
dc.date.available2019-08-19T23:45:11Z
dc.date.issued2015
dc.identifier.citationDORIA, RODRIGO T.; SOUZA, M. A. S.; MARTINO, João Antonio; SIMOEN, Eddy; CLAEYS, Cor; PAVANELLO, Marcelo A.. In-depth low frequency noise evaluation of substrate rotation and strain engineering in n-type triple gate SOI FinFETs. Microelectronic Engineering, v. 147, p. 92-95, 2015.
dc.identifier.issn0167-9317
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1107
dc.description.abstract© 2015 Elsevier B.V. All rights reserved.This work presents an experimental analysis of the low-frequency noise and the effective trap density of conventional, strained, rotated and strained-rotated SOI n-type FinFETs, respectively, for several fin widths biased at different gate voltages. Additionally, the profile of the effective trap density is presented along the depth of the gate dielectric of the devices. It is shown that strained devices present higher noise than conventional ones, independent on the fin width, which can be explained by poorer interface quality observed in strained devices. On the other hand, the low frequency noise of narrow rotated devices, where the main conduction path changes from top to sidewalls, has shown to reduce as the interface integrity is improved by substrate rotation. All the evaluated devices presented 1/f noise as the dominant noise component up to 1 kHz.
dc.relation.ispartofMicroelectronic Engineering
dc.rightsAcesso Restrito
dc.titleIn-depth low frequency noise evaluation of substrate rotation and strain engineering in N-type triple gate SOI Finfets
dc.typeArtigo


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