dc.contributor.author | Trevisoli R.D. | |
dc.contributor.author | Doria R.T. | |
dc.contributor.author | De Souza M. | |
dc.contributor.author | Pavanello M.A. | |
dc.date.accessioned | 2019-08-19T23:45:10Z | |
dc.date.available | 2019-08-19T23:45:10Z | |
dc.date.issued | 2013 | |
dc.identifier.citation | TREVISOLI, R D; DORIA, Rodrigo Trevisoli; DE SOUZA, Michelly; PAVANELLO, Marcelo A.. A physically-based threshold voltage definition, extraction and analytical model for junctionless nanowire transistors. Solid-State Electronics, v. 90, p. 12-17, 2013. | |
dc.identifier.issn | 0038-1101 | |
dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/1096 | |
dc.description.abstract | This work proposes a physically-based definition for the threshold voltage, VTH, of junctionless nanowire transistors and a methodology to extract it. The VTH is defined as the point of equal magnitude for the drift and diffusion components of the drain current. The methodology for VTH extraction uses the device transconductance over drain current ratio characteristics. An analytical model for the threshold voltage based on the same definition has also been developed. Both VTH extraction method and model have been validated through 3D simulations and have been applied to experimental devices. The proposed method has shown to provide a correct dependence on the temperature, while the double derivative of the drain current method overestimates this variation. © 2013 Elsevier Ltd. All rights reserved. | |
dc.relation.ispartof | Solid-State Electronics | |
dc.rights | Acesso Restrito | |
dc.title | A physically-based threshold voltage definition, extraction and analytical model for junctionless nanowire transistors | |
dc.type | Artigo | |