| dc.contributor.author | CARVALHO, CESAR AUGUSTO BELCHIOR | |
| dc.contributor.author | SILVA, GENARO MARINIELLO DA | |
| dc.contributor.author | PAZ, BRUNA CARDOSO | |
| dc.contributor.author | BARRAUD, SYLVAIN | |
| dc.contributor.author | VINET, MAUD | |
| dc.contributor.author | FAYNOT, OLIVIER | |
| dc.contributor.author | Marcelo Antonio Pavanello | |
| dc.date.accessioned | 2021-11-09T18:02:41Z | |
| dc.date.available | 2021-11-09T18:02:41Z | |
| dc.date.issued | 2020-08-11 | |
| dc.identifier.citation | CARVALHO, C. A. B.; MARINIELLO, G.; PAZ, B. C.; BARRAUD, S.; VINET, M.; FAYNOT, O.; PAVANELLO, M. A. Performance and analysis of n-Type vertically stacked nanowires regarding harmonic distortion. JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGUÊS), v. 15, p. 1-5, 2020. | |
| dc.identifier.issn | 1872-0234 | |
| dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/3452 | |
| dc.description.abstract | Thispaperstudies theharmonic distortion (or non-linearity) of vertically stacked SOI nanowireswith differ-ent fin widths and channel lengths. The total harmonic distor-tion and third order harmonic distortion areused as figuresof meritin this work. The harmonicdistortion analysis is per-formed taking in consideration the differences between transis-tor’s intrinsic voltage gain and transconductance over drain current ratio. | |
| dc.relation.ispartof | JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGUÊS) | |
| dc.rights | Acesso Aberto | |
| dc.subject | stacked nanowires | |
| dc.subject | harmonic distortion | |
| dc.subject | MOSFET | |
| dc.subject | SOI transistor | |
| dc.title | Performance and Analysis of n-Type Vertically Stacked Nanowires Regarding Harmonic Distortion | pt_BR |
| dc.type | Artigo | pt_BR |
