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Analysis of uniaxial and biaxial strain impact on the linearity of fully depleted SOI nMOSFETs
(2007)
This work studies the impact of uniaxial, biaxial and combined uniaxial-biaxial strain on the linearity of nMOSFETs from a 65 nm fully depleted (FD) SOI technology. The total harmonic distortion (THD) and third-order ...
Cryogenic operation of FinFETs aiming at analog applications
(2009)
FinFETs are recognized as promising candidates for the CMOS nanometer era. In this paper the most recent results for cryogenic operation of FinFETs will be demonstrated with special emphasis on analog applications. Threshold ...
Analysis of temperature variation influence on the analog performance of 45° rotated triple-gate nMuGFETs
(2012)
This work presents the analog performance of n-type triple-gate MuGFETs with high-k dielectrics and TiN gate material fabricated in 45° rotated SOI substrates comparing their performance with standard MuGFETs fabricated ...
The low-frequency noise behaviour of graded-channel SOI nMOSFETs
(2007)
It is shown that the low-frequency noise in graded-channel (GC) SOI nMOSFETs is generally of the flicker or 1/f noise type. The corresponding input-referred noise spectral density is markedly higher than for the conventional ...
Impact of halo implantation on 0.13 μm floating body partially depleted SOI n-MOSFETs in low temperature operation
(2005)
This work studies the effect of halo implantation on the electrical characteristics of deep-submicrometer partially depleted SOI nMOSFETs during low temperature and floating body operation. Parameters such as the drain ...
Analog performance of standard and strained triple-gate silicon-on-insulator nFinFETs
(2008)
This work shows a comparison between the analog performance of standard and strained Si n-type triple-gate FinFETs with high-κ dielectrics and TiN gate material. Different channel lengths and fin widths are studied. It is ...
High performance analog operation of double gate transistors with the graded-channel architecture at low temperatures
(2005)
This work studies the use of channel engineering by means of graded-channel profile on double gate SOI MOSFETs for improving the analog performance and comparing their output characteristics with conventional double gate ...
Evaluation of triple-gate FinFETs with SiO2-HfO2-TiN gate stack under analog operation
(2007)
This work presents the analog performance of nMOS triple-gate FinFETs with high-κ dielectrics, TiN gate material and undoped body from DC measurements. Different fin widths and devices with and without halo implantation ...
Trapezoidal SOI FinFET analog parameters' dependence on cross-section shape
(2009)
The trapezium is often a better approximation for the FinFET cross-section shape, rather than the design-intended rectangle. The frequent width variations along the vertical direction, caused by the etching process that ...
Low-frequency noise of n-type triple gate FinFETs fabricated on standard and 45 rotated substrates
(2013)
This paper studies the impact of the 45 substrate rotation on the low-frequency noise (LFN) of triple gate nFinFETs. The overall LFN has been extracted for both standard and 45 substrate rotated devices of several fin ...