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Analysis of source-follower buffers implemented with graded-channel SOI nMOSFETs operating at cryogenic temperatures
(2009)
This work studies the operation of source-follower buffers implemented with standard and graded-channel (GC) fully depleted (FD) SOI nMOSFETs at low temperatures. The analysis is performed by comparing the voltage gain of ...
Cryogenic operation of graded-channel silicon-on-insulator nMOSFETs for high performance analog applications
(2006)
We present in this work an analysis of the low temperature operation of Graded-Channel fully depleted Silicon-On-Insulator (SOI) nMOSFETs for analog applications, in the range of 100-300 K. This analysis is supported by a ...
Advantages of graded-channel SOI nMOSFETs for application as source-follower analog buffer
(2008)
In this work the performance of graded-channel (GC) SOI MOSFETs operating as source-follower buffers is presented. The experimental analysis is performed by comparing the gain and linearity of buffers implemented with GC ...
Advantages of the graded-channel SOI FD MOSFET for application as a quasi-linear resistor
(2005)
In this paper, we analyze the previously unexpected advantages of asymmetric channel engineering on the MOS resistance behavior in quasi-linear operation, such as used in integrated continuous-time tunable filters. The ...
The low-frequency noise behaviour of graded-channel SOI nMOSFETs
(2007)
It is shown that the low-frequency noise in graded-channel (GC) SOI nMOSFETs is generally of the flicker or 1/f noise type. The corresponding input-referred noise spectral density is markedly higher than for the conventional ...
Harmonic distortion analysis of double gate graded-channel MOSFETs operating in saturation
(2008)
In this work we present an analysis of harmonic distortion (HD) in graded-channel (GC) gate-all-around (GAA) devices operating in saturation region for analog applications. The study has been performed through device ...
High performance analog operation of double gate transistors with the graded-channel architecture at low temperatures
(2005)
This work studies the use of channel engineering by means of graded-channel profile on double gate SOI MOSFETs for improving the analog performance and comparing their output characteristics with conventional double gate ...
A charge-based continuous model for submicron graded-channel nMOSFET for analog circuit simulation
(2005)
In this work a continuous analytical model for analog simulation of submicron asymmetrically doped silicon-on-insulator (SOI) nMOSFET using the graded-channel (GC) architecture, valid from weak to strong inversion regimes, ...
Gain improvement in operational transconductance amplifiers using Graded-Channel SOI nMOSFETS
(2006)
This paper studies the performance of operational transconductance amplifiers (OTAs) fabricated with Graded-Channel (GC) SOI nMOSFETs and designed to provide high open-loop voltage gain or high gain-bandwidth characteristics. ...