Now showing items 1-6 of 6
Impact of Using the Octagonal Layout for SOI MOSFETs in a High-Temperature Environment
© 2015 IEEE.The impact of high-temperature effects is experimentally investigated in the octagonal layout style for planar silicon-on-insulator (SOI) metal-oxide-semiconductor (MOS) field-effect transistors (MOSFETs), named ...
Diamond layout style impact on SOI MOSFET in high temperature environment
© 2015 Elsevier Ltd.This work performs an experimental comparative study between the Diamond (hexagonal gate geometry) and Standard layouts styles for Metal-Oxide-Semiconductor Field Effect Transistor in high temperatures ...
Compact diamond MOSFET model accounting for PAMDLE applicable down 150 nm node
© The Institution of Engineering and Technology 2014.The performance improvements for integrated circuit applications of silicon-on-insulator (SOI) metal-oxide semiconductor field-effect transistors (MOSFETs) implemented ...
Using diamond layout style to boost MOSFET frequency response of analogue IC
A way to improve the metal-oxide-semiconductor field effect transistor (MOSFET) analogue electrical performance, still little explored, is to modify their aspect form or ratio (AR) by the use of innovative layout styles. ...
Gain improvement in operational transconductance amplifiers using Graded-Channel SOI nMOSFETS
This paper studies the performance of operational transconductance amplifiers (OTAs) fabricated with Graded-Channel (GC) SOI nMOSFETs and designed to provide high open-loop voltage gain or high gain-bandwidth characteristics. ...
Boosting the total ionizing dose tolerance of digital switches by using OCTO SOI MOSFET
© 2015 IOP Publishing Ltd.This paper performs an experimental comparative study of the total ionizing dose effects due to the x-ray radiation between the silicon-on-insulator (SOI) metal-oxide semiconductor field-effect ...