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Methodology to separate channel conductions of two level vertically stacked SOI nanowire MOSFETs
(2018)
© 2018 Elsevier LtdThis work proposes a new method for dissociating both channel conductions of two levels vertically stacked inversion mode nanowires (NWs) composed by a Gate-All-Around (GAA) level on top of an Ω-gate ...
Physical insights on the dynamic response of SOI n-and p-type junctionless nanowire transistors
(2018)
© 2018, Brazilian Microelectronics Society. All rights reserved.— This work evaluates, for the first time, the roles of the intrinsic capacitances and the series resistance on the dynamic response of p-and n-type Junctionless ...