Search
Now showing items 1-3 of 3
Advantages of the graded-channel SOI FD MOSFET for application as a quasi-linear resistor
(2005)
In this paper, we analyze the previously unexpected advantages of asymmetric channel engineering on the MOS resistance behavior in quasi-linear operation, such as used in integrated continuous-time tunable filters. The ...
High performance analog operation of double gate transistors with the graded-channel architecture at low temperatures
(2005)
This work studies the use of channel engineering by means of graded-channel profile on double gate SOI MOSFETs for improving the analog performance and comparing their output characteristics with conventional double gate ...
A charge-based continuous model for submicron graded-channel nMOSFET for analog circuit simulation
(2005)
In this work a continuous analytical model for analog simulation of submicron asymmetrically doped silicon-on-insulator (SOI) nMOSFET using the graded-channel (GC) architecture, valid from weak to strong inversion regimes, ...