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Analysis of temperature variation influence on the analog performance of 45° rotated triple-gate nMuGFETs

Pavanello M.A.; Souza M.D.; Martino J.A.; Simoen E.; Claeys C. (2012)

This work presents the analog performance of n-type triple-gate MuGFETs with high-k dielectrics and TiN gate material fabricated in 45° rotated SOI substrates comparing their performance with standard MuGFETs fabricated ...

Analog performance of standard and uniaxial strained triple-gate SOI FinFETs under x-ray radiation

Bordallo C.C.M.; Teixeira F.F.; Silveira M.A.G.; Martino J.A.; Agopian P.G.D.; Simoen E.; Claeys C. (2014)

© 2014 IOP Publishing Ltd.The influence of x-ray irradiation on the main digital and analog parameters of triple gate silicon-on- insulator FinFETs is investigated for unstrained and uniaxially strained devices. Comparing ...

Improved operation of graded-channel SOI nMOSFETs down to liquid helium temperature

Pavanello M.A.; De Souza M.; Ribeiro T.A.; Martino J.A.; Flandre D. (2016)

© 2016 IOP Publishing Ltd.This paper presents the operation of Graded-Channel (GC) Silicon-On-Insulator (SOI) nMOSFETs at low temperatures down to liquid helium temperature in comparison to standard uniformly doped ...

SOI technology characterization using SOI-MOS capacitor

Sonnenberg V.; Martino J.A. (2005)

In this paper a set of simple methods is presented, to determine the main parameters of the silicon on insulator technology, using a thin film SOI-MOS capacitor. Methods to obtain the effective substrate doping concentration, ...

Evaluation of graded-channel SOI MOSFET operation at high temperatures

Galeti M.; Pavanello M.A.; Martino J.A. (2006)

This paper presents a comparative analysis between graded-channel (GC) and conventional fully depleted SOI MOSFETs devices operating at high temperatures (up to 300 °C). The electrical characteristics such as threshold ...

Cryogenic operation of graded-channel silicon-on-insulator nMOSFETs for high performance analog applications

Pavanello M.A.; Der Agopian P.G.; Martino J.A.; Flandre D. (2006)

We present in this work an analysis of the low temperature operation of Graded-Channel fully depleted Silicon-On-Insulator (SOI) nMOSFETs for analog applications, in the range of 100-300 K. This analysis is supported by a ...

In-depth low frequency noise evaluation of substrate rotation and strain engineering in N-type triple gate SOI Finfets

Doria R.T.; De Souza M.A.S.; Martino J.A.; Simoen E.; Claeys C.; Pavanello M.A. (2015)

© 2015 Elsevier B.V. All rights reserved.This work presents an experimental analysis of the low-frequency noise and the effective trap density of conventional, strained, rotated and strained-rotated SOI n-type FinFETs, ...

Different stress techniques and their efficiency on triple-gate SOI n-MOSFETs

Buhler R.T.; Agopian P.G.D.; Collaert N.; Simoen E.; Claeys C.; Martino J.A. (2015)

© 2014 Elsevier Ltd. All rights reserved.Three techniques to implement mechanical stress in n-channel Multiple Gate MOSFETs (MuGFETs) are investigated through 3D simulations and transconductance measurements. They are: ...

Low temperature influence on the uniaxially strained FD SOI nMOSFETs behavior

de Souza M.; Pavanello M.A.; Martino J.A.; Simoen E.; Claeys C. (2007)

This work presents the impact of low temperature operation on the characteristics of uniaxially strained fully-depleted SOI nMOSFETs. Devices with channel lengths down to 160 nm were explored in the range 100-380 K. The ...