Comparative Analysis of Transcapacitances in Asymmetric Self-Cascode and Graded-Channel SOI nMOSFETs
| dc.contributor.author | ALVES, C. R. | |
| dc.contributor.author | D'OLIVEIRA, L. M. | |
| dc.contributor.author | Michelly De Souza | |
| dc.date.accessioned | 2022-12-01T06:03:25Z | |
| dc.date.accessioned | 2024-02-27T16:29:53Z | |
| dc.date.available | 2022-12-01T06:03:25Z | |
| dc.date.available | 2024-02-27T16:29:53Z | |
| dc.date.issued | 2022-07-04 | |
| dc.identifier.citation | ALVES, C. R.; D'OLIVEIRA, L. M.; DE SOUZA, .M. Comparative Analysis of Transcapacitances in Asymmetric Self-Cascode and Graded-Channel SOI nMOSFETs. 2022 IEEE Latin America Electron Devices Conference, LAEDC 2022, Jul. 2022. | |
| dc.identifier.uri | https://hdl.handle.net/20.500.12032/122156 | |
| dc.description.abstract | © 2022 IEEE.This work presents a comparative study of the transcapacitances of asymmetric self-cascode (A-SC) and graded-channel (GC) silicon-on-insulator (SOI) nMOSFETs, by means of two-dimensional numerical simulations. Simulated results show that the gate-to-drain capacitance is smaller for the ASC SOI device if compared to the GC SOI device, despite of the applied VDS. | |
| dc.relation.ispartof | 2022 IEEE Latin America Electron Devices Conference, LAEDC 2022 | |
| dc.rights | Acesso Restrito | |
| dc.title | Comparative Analysis of Transcapacitances in Asymmetric Self-Cascode and Graded-Channel SOI nMOSFETs | |
| dc.type | Artigo de evento |
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