dc.contributor.author | Michelly De Souza | |
dc.contributor.author | FLANDRE, D. | |
dc.contributor.author | Marcelo Antonio Pavanello | |
dc.date.accessioned | 2023-08-26T23:50:11Z | |
dc.date.accessioned | 2024-02-27T16:29:50Z | |
dc.date.available | 2023-08-26T23:50:11Z | |
dc.date.available | 2024-02-27T16:29:50Z | |
dc.date.issued | 2008-01-05 | |
dc.identifier.citation | DE SOUZA, M.; FLANDRE, D.; PAVANELLO, M. A. Study of matching properties of graded-channel SOI MOSFETs. Journal of Integrated Circuits and Systems, v. 3, n. 2, p. 69-75, 2008. | |
dc.identifier.issn | 1807-1953 | |
dc.identifier.uri | https://hdl.handle.net/20.500.12032/122151 | |
dc.description.abstract | In this paper an overall analysis on the matching properties of Graded-Channel (GC) SOI MOSFETs in comparison to conventional SOI transistors is performed. Experimental results show that GC devices present poorer matching behavior in comparison to conventional SOI counterpart for equal mask channel length, whereas for same effective channel length, almost the same matching behavior. The analytical model for the drain current of GC devices is used to investigate the reasons for this matching worsening. Two-dimensional numerical simulations are used to validate the model-based analysis both in linear and saturation regions. | |
dc.relation.ispartof | Journal of Integrated Circuits and Systems | |
dc.rights | Acesso Restrito | |
dc.title | Study of matching properties of graded-channel SOI MOSFETs | |
dc.type | Artigo | |