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Modeling of thin-film lateral SOI PIN diodes with an alternative multi-branch explicit current model
dc.contributor.author | Lugo-Munoz | |
dc.contributor.author | Muci J. | |
dc.contributor.author | Ortiz-Conde A. | |
dc.contributor.author | Garcia-Sanchez F.J. | |
dc.contributor.author | de Souza M. | |
dc.contributor.author | Flandre D. | |
dc.contributor.author | Pavanello M.A. | |
dc.date.accessioned | 2023-08-26T23:49:11Z | |
dc.date.accessioned | 2024-02-27T16:29:44Z | |
dc.date.available | 2023-08-26T23:49:11Z | |
dc.date.available | 2024-02-27T16:29:44Z | |
dc.date.issued | 2012 | |
dc.identifier.issn | 1807-1953 | |
dc.identifier.uri | https://hdl.handle.net/20.500.12032/122142 | |
dc.description.abstract | We propose the use of an alternative multi-exponential model to describe multiple conduction mechanisms in thin-film SOI PIN diodes with parasitic series resistance over a wide operating temperature range, from 90 to 390 K. This alternative multi-exponential model can be used for semiconductor junctions which exhibit multiple conduction mechanisms with series and shunt resistances. Using Thevenin's theorem and the Lambert W function, the terminal current is expressed explicitly as a function of the terminal voltage. Its explicit nature allows higher computational efficiency and makes this model better suited for repetitive simulation applications than conventional implicit models. Additionally, direct analytic differentiation and integration are possible. This alternative model is used to describe the I-V characteristics of real SOI PIN diodes. | |
dc.relation.ispartof | Journal of Integrated Circuits and Systems | |
dc.rights | Acesso Restrito | |
dc.title | Modeling of thin-film lateral SOI PIN diodes with an alternative multi-branch explicit current model | |
dc.type | Artigo |
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