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dc.rights.licenseCreative Commons "Este é um artigo publicado em acesso aberto sob uma licença Creative commons (CC BY NC ND 4.0). Fonte: https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85145272257&origin=inward. Acesso em : 07/ fev. 2023.
dc.contributor.authorMarcelo Antonio Pavanello
dc.contributor.authorMichelly De Souza
dc.date.accessioned2023-02-01T06:03:13Z
dc.date.accessioned2024-02-27T16:29:32Z
dc.date.available2023-02-01T06:03:13Z
dc.date.available2024-02-27T16:29:32Z
dc.date.issued2022-09-17
dc.identifier.citationPAVANELLO, M. A.; DE SOUZA, M. Performance of SOI Ω-Gate Nanowires from Cryogenic to High Temperatures. Journal of Integrated Circuits and Systems, v. 17, n. 2, p. 1-8, sept. 2022.
dc.identifier.issn1872-0234
dc.identifier.urihttps://hdl.handle.net/20.500.12032/122125
dc.description.abstract© 2022, Brazilian Microelectronics Society. All rights reserved.—This review paper presents the electrical characteristics of Silicon-On-Insulator Ω-Gate nanowires in a wide range of temperatures. The operation in cryogenic and high-temperature environments will be experimentally explored. The influence of nanowire width and channel length will be dis-cussed. Nanowires with and without strain will be investigated from room temperature down to cryogenic ones, showing that strained nanowires improve carrier mobility in the whole temperature range. At high temperatures, it is demonstrated that nanowires can operate successfully up to 580 K, maintaining the ideal body factor. The effect of high temperatures on Gate-In-duced Drain Leakage will also be studied. The experimental re-sults in the whole temperature range confirm that SOI nan-owires are an excellent alternative for FinFET replacement in future technological nodes.
dc.relation.ispartofJournal of Integrated Circuits and Systems
dc.rightsAcesso Aberto
dc.titlePerformance of SOI Ω-Gate Nanowires from Cryogenic to High Temperatures
dc.typeArtigo


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