| dc.description.abstract | The importance of the Power Distribution Network (PDN) characterization, for high performance Integrated Circuits (IC), through simulation, is addressed in this work. This work comprises the simulation and measurement of the path behavior between the power source output and the IC. This path corresponds to the PDN of study case circuit. The PDN power integrity is one of the factors that guarantee the signal integrity and the signal integrity guarantees the information transmission from the transmitter to the receiver. Currently, high-speed digital projects are crossing the 1 Gbps information exchange barrier (bit switching) and increasingly demand for low-noise power. The high-performance ICs, responsible for this high data transmission rate, are reaching 3.2 Tbps throughput and require power sources with voltages below 1 V and currents in the order of hundreds of Amperes. In this work, the power integrity of a Printed Circuit Board (PCB) is evaluated based on the behavior of the PDN voltage drop and the PDN impedance. The results are validated with simulations and measurements performed on a PCB Case Study. The PCB uses an Ethernet Switch IC in a 2.4 Tbps throughput application. Is also, an analysis performed for until 3.2 Tbps throughput. The methodology adopted in this work for tasks execution was the appropriate engineering triangle, composed by the understanding, simulation and measurement. This work presents the simulations, analyzes and results obtained and reinforces the importance to use simulators to predict occurrences even before the manufacture of prototypes. It presents too the PDN measurement using different instruments, the care and restrictions of the instrumentation, as example, the set of instruments formed by a signal generator and an oscilloscope that can be a great alternative to the lack of a Vector Network Analyzer (VNA), to carry out the qualitative characterization of the impedance certain PDNs. | en |
